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PCK940L
Low voltage 1 : 18 clock distribution chip
Rev. 01 -- 4 April 2006 Product data sheet
1. General description
The PCK940L is a 1 : 18 low voltage clock distribution chip with 2.5 V or 3.3 V LVCMOS output capabilities. The device features the capability to select either a differential LVPECL or an LVCMOS compatible input. The 18 outputs are 2.5 V or 3.3 V LVCMOS compatible and feature the drive strength to drive 50 series or parallel terminated transmission lines. With output-to-output skews of 150 ps, the PCK940L is ideal as a clock distribution chip for the most demanding of synchronous systems. The 2.5 V outputs also make the device ideal for supplying clocks for a high performance microprocessor based design. With a low output impedance of approximately 20 , in both the HIGH and LOW logic states, the output buffers of the PCK940L are ideal for driving series terminated transmission lines. With an output impedance of 20 , the PCK940L has the capability of driving two series terminated transmission lines from each output. This gives the PCK940L an effective fan-out of 1 : 36. If a lower output impedance is desired, please see the PCK942C data sheet. The differential LVPECL inputs of the PCK940L allow the device to interface directly with a LVPECL fan-out buffer like the PCKEP111 to build very wide clock fan-out trees or to couple to a high frequency clock source. The LVCMOS input provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH on the LVCMOS_CLKSEL pin will select the LVCMOS level clock input. All inputs of the PCK940L have internal pull-up/pull-down resistors so they can be left open if unused. The PCK940L is a single or dual supply device. The device power supply offers a high degree of flexibility. The device can operate with a 3.3 V core and 3.3 V output, a 3.3 V core and 2.5 V outputs, as well as a 2.5 V core and 2.5 V outputs. The 32-lead LQFP package was chosen to optimize performance, board space and cost of the device. The 32-lead LQFP package has a 7 mm x 7 mm body size with a conservative 0.8 mm pin spacing.
2. Features
I I I I I LVPECL or LVCMOS clock input 2.5 V LVCMOS outputs for Pentium II microprocessor support 150 ps maximum output-to-output skew Maximum output frequency of 250 MHz at 3.3 V VCC 32-lead LQFP packaging
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
I Dual or single supply voltage: N Dual VCC supply voltage, 3.3 V core and 2.5 V output N Single 3.3 V VCC supply voltage for 3.3 V outputs N Single 2.5 V VCC supply voltage for 2.5 V I/O
3. Ordering information
Table 1. Ordering information Package Name PCK940LBD LQFP32 Description plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm Version SOT358-1 Type number
4. Functional diagram
PCK940L
PECL_CLK PECL_CLK LVCMOS_CLK 0 Q0 1
16
Q1 to Q16
LVCMOS_CLKSEL (internal pull-down)
Q17
002aab887
Fig 1. Functional diagram of PCK940L
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
2 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
5. Pinning information
5.1 Pinning
25 GND1 24 Q6 23 Q7 22 Q8 21 VCC2 20 Q9 19 Q10 18 Q11 17 GND2 Q16 10 Q15 11 GND1 12 Q14 13 Q13 14 Q12 15 VCC1 16 9
002aab888
29 VCC1
32 Q0
31 Q1
30 Q2
28 Q3
27 Q4
GND1 GND2 LVCMOS_CLK LVCMOS_CLKSEL PECL_CLK PECL_CLK VCC2 VCC1
1 2 3 4 5 6 7 8
PCK940LBD
Fig 2. Pin configuration for LQFP32
5.2 Pin description
Table 2. Symbol PECL_CLK PECL_CLK LVCMOS_CLK LVCMOS_CLKSEL Q0 to Q17 Pin description Pin 5 6 3 4 32, 31, 30, 28, 27, 26, 24, 23, 22, 20, 19, 18, 15, 14, 11, 10, 9 1, 12, 25 2, 17 8, 16, 29 7, 21 I/O input input input input output Type LVPECL LVPECL LVCMOS LVCMOS LVCMOS Description reference clock input reference clock input (active LOW) alternative reference clock input clock source select clock outputs
GND1 GND2 VCC1 VCC2
-
Q17
supply supply supply supply
26 Q5
output negative power supply core negative power supply output positive power supply core positive power supply
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
3 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
6. Functional description
Refer to Figure 1 "Functional diagram of PCK940L".
6.1 Function table
Table 3. 0 1 Table 4. Supply pin VCC2 VCC1 Function table Input PECL_CLK LVCMOS_CLK Power supply voltage Voltage level 2.5 V or 3.3 V 5 % 2.5 V or 3.3 V 5 % LVCMOS_CLKSEL
7. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VI II Tstg Parameter supply voltage input voltage input current storage temperature Conditions Min -0.3 -0.3 -40 Max +3.6 VDD + 0.3 20 +125 Unit V V mA C
8. Static characteristics
Table 6. Static characteristics (3.3 V VCC, 3.3 V outputs) Tamb = 0 C to 70 C; VCC2 = 3.3 V 5 %; VCC1 = 3.3 V 5 % Symbol VIH VIL Vi(p-p) VICR VOH VOL II Ci CPD Zo ICC(max) Parameter HIGH-level input voltage LOW-level input voltage peak-to-peak input voltage common mode input voltage range HIGH-level output voltage LOW-level output voltage input current input capacitance power dissipation capacitance output impedance maximum supply current per output Conditions LVCMOS_CLK LVCMOS_CLK PECL_CLK PECL_CLK IOH = -20 mA IOH = 20 mA Min 2.4 500 VCC - 1.4 2.4 18 Typ 4.0 10 23 0.5 Max VCC2 0.8 1000 VCC - 0.6 0.5 200 28 1.0 Unit V V mV V V V A pF pF mA
PCK940L_1
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Product data sheet
Rev. 01 -- 4 April 2006
4 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
Table 7. Static characteristics (3.3 V VCC, 2.5 V outputs) Tamb = 0 C to 70 C; VCC2 = 3.3 V 5 %; VCC1 = 2.5 V 5 % Symbol VIH VIL Vi(p-p) VICR VOH VOL II Ci CPD Zo ICC(max) Parameter HIGH-level input voltage LOW-level input voltage peak-to-peak input voltage common mode input voltage range HIGH-level output voltage LOW-level output voltage input current input capacitance power dissipation capacitance output impedance maximum supply current per output Conditions LVCMOS_CLK LVCMOS_CLK PECL_CLK PECL_CLK IOH = -20 mA IOH = 20 mA Min 2.4 500 VCC - 1.4 1.8 Typ 4.0 10 23 0.5 Max VCC2 0.8 1000 VCC - 0.6 0.5 200 1.0 Unit V V mV V V V A pF pF mA
Table 8. Static characteristics (2.5 V VCC, 2.5 V output) Tamb = 0 C to 70 C; VCC2 = 2.5 V 5 %; VCC1 = 2.5 V 5 % Symbol VIH VIL Vi(p-p) VICR VOH VOL II Ci CPD Zo ICC(max) Parameter HIGH-level input voltage LOW-level input voltage peak-to-peak input voltage common mode input voltage range HIGH-level output voltage LOW-level output voltage input current input capacitance power dissipation capacitance output impedance maximum supply current per output Conditions LVCMOS_CLK LVCMOS_CLK PECL_CLK PECL_CLK IOH = -20 mA IOH = 20 mA Min 2.0 500 VCC - 1.0 1.8 18 Typ 4.0 10 23 0.5 Max VCC2 0.8 1000 VCC - 0.6 0.5 200 28 1.0 Unit V V mV V V V A pF pF mA
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
5 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
9. Dynamic characteristics
Table 9. Dynamic characteristics (3.3 V VCC, 3.3 V output) Tamb = 0 C to 70 C; VCC2 = 3.3 V 5 %; VCC1 = 3.3 V 5 % Symbol foper(max) tPLH Parameter maximum operating frequency LOW-to-HIGH propagation delay PECL_CLK 150 MHz LVCMOS_CLK 150 MHz PECL_CLK > 150 MHz LVCMOS_CLK > 150 MHz tsk(o) output skew time output-to-output PECL_CLK LVCMOS_CLK tsk(pr) process skew time part-to-part PECL_CLK < 150 MHz LVCMOS_CLK < 150 MHz PECL_CLK > 150 MHz LVCMOS_CLK > 150 MHz PECL_CLK LVCMOS_CLK o output duty cycle LCVMOS_CLK; input = 50 % fclk < 134 MHz fclk 250 MHz PECL_CLK; input = 50 % fclk < 134 MHz fclk 250 MHz tr tf
[1] [2] [3]
[1][2] [1][2] [1][2] [1][2] [1][3] [1][3] [1] [1] [1] [1]
Conditions
Min 2.0 1.8 2.0 1.8 45 40 35 40 0.3 0.3
Typ 2.7 2.5 2.9 2.4 50 50 50 50 -
Max 250 3.8 3.0 3.7 3.2 200 150 1.4 1.2 1.7 1.4 850 750 55 60 65 60 1.1 1.1
Unit MHz ns ns ns ns ps ps ns ns ns ns ps ps % % % % ns ns
rise time fall time
output; from 0.5 V to 2.4 V output; from 2.4 V to 0.5 V
Tested using standard input levels, production tested at 150 MHz. Across temperature and voltage ranges, includes output skew. For a specific temperature and voltage, includes output skew.
PCK940L_1
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Product data sheet
Rev. 01 -- 4 April 2006
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Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
Table 10. Dynamic characteristics (3.3 V VCC, 2.5 V output) Tamb = 0 C to 70 C; VCC2 = 3.3 V 5 %; VCC1 = 2.5 V 5 % Symbol foper(max) tPLH Parameter maximum operating frequency LOW-to-HIGH propagation delay PECL_CLK 150 MHz LVCMOS_CLK 150 MHz PECL_CLK > 150 MHz LVCMOS_CLK > 150 MHz tsk(o) output skew time output-to-output PECL_CLK LVCMOS_CLK tsk(pr) process skew time part-to-part PECL_CLK < 150 MHz LVCMOS_CLK < 150 MHz PECL_CLK > 150 MHz LVCMOS_CLK > 150 MHz PECL_CLK LVCMOS_CLK o output duty cycle LCVMOS_CLK; input = 50 % fclk < 134 MHz fclk 250 MHz PECL_CLK; input = 50 % fclk < 134 MHz fclk 250 MHz tr tf
[1] [2] [3]
[1][2] [1][2] [1][2] [1][2] [1][3] [1][3] [1] [1] [1] [1]
Conditions
Min 2.0 1.7 2.0 1.8 45 40 35 40 0.3 0.3
Typ 2.8 2.5 2.9 2.5 50 50 50 50 -
Max 250 4.0 3.0 4.0 3.3 300 150 1.5 1.3 1.8 1.5 850 750 55 60 65 60 1.2 1.2
Unit MHz ns ns ns ns ps ps ns ns ns ns ps ps % % % % ns ns
rise time fall time
output; from 0.5 V to 1.8 V output; from 1.8 V to 0.5 V
Tested using standard input levels, production tested at 150 MHz. Across temperature and voltage ranges, includes output skew. For a specific temperature and voltage, includes output skew.
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
7 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
Table 11. Dynamic characteristics (2.5 V VCC, 2.5 V output) Tamb = 0 C to 70 C; VCC2 = 2.5 V 5 %; VCC1 = 2.5 V 5 % Symbol foper(max) tPLH Parameter maximum operating frequency LOW-to-HIGH propagation delay PECL_CLK 150 MHz LVCMOS_CLK 150 MHz PECL_CLK > 150 MHz LVCMOS_CLK > 150 MHz tsk(o) output skew time output-to-output PECL_CLK LVCMOS_CLK tsk(pr) process skew time part-to-part PECL_CLK < 150 MHz LVCMOS_CLK < 150 MHz PECL_CLK > 150 MHz LVCMOS_CLK > 150 MHz PECL_CLK LVCMOS_CLK o output duty cycle LCVMOS_CLK; input = 50 % fclk < 134 MHz fclk 250 MHz PECL_CLK; input = 50 % fclk < 134 MHz fclk 250 MHz tr tf
[1] [2] [3]
[1][2] [1][2] [1][2] [1][2] [1][3] [1][3] [1] [1] [1] [1]
Conditions
Min 2.6 2.3 2.8 2.3 45 40 35 40 0.3 0.3
Typ 4.0 3.1 3.8 3.1 50 50 50 50 -
Max 200 5.2 4.0 5.0 4.0 300 200 2.6 1.7 2.2 1.7 1.2 1.0 55 60 65 60 1.2 1.2
Unit MHz ns ns ns ns ps ps ns ns ns ns ns ns % % % % ns ns
rise time fall time
output; from 0.5 V to 1.8 V output; from 1.8 V to 0.5 V
Tested using standard input levels, production tested at 150 MHz. Across temperature and voltage ranges, includes output skew. For a specific temperature and voltage, includes output skew.
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
8 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
9.1 Timing diagrams
PECL_CLK Vi(p-p) tPD VCC Qn 0.5VCC GND
002aab893
VCC VICR LVCMOS_CLK 0.5VCC GND tPD VCC Qn 0.5VCC GND
002aab892
PECL_CLK
Fig 3. Propagation delay (tPD) test reference
Fig 4. LVCMOS_CLK propagation delay (tPD) test reference
VCC 0.5VCC GND tsk(o) VCC 0.5VCC GND
002aab891
VCC 0.5VCC tp To o = (tp / To x 100 %)
002aab291
GND
The time from the PLL controlled edge to the non-controlled edge, divided by the time between PLL controlled edges, expressed as a percentage.
The pin-to-pin skew is defined as the worst-case difference in propagation delay between any two similar delay paths within a single device.
Fig 5. Output duty cycle
Fig 6. Output-to-output skew
(1) (2)
tf
tr
002aab292
(1) output 2.4 V; input 2.0 V (VCC = 3.3 V) output 1.8 V; input 1.7 V (VCC = 2.5 V) (2) output 0.55 V; input 0.8 V (VCC = 3.3 V) output 0.6 V; input 0.7 V (VCC = 2.5 V)
Fig 7. Transition time test reference
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
9 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
10. Test information
PCK940L D.U.T.
DIFFERENTIAL PULSE GENERATOR Z = 50
Zo = 50
Zo = 50
RT = 50
RT = 50
VT
VT
002aab889
Fig 8. LVCMOS_CLK PCK940L AC test reference for VCC = 3.3 V and VCC = 2.5 V
DIFFERENTIAL PULSE GENERATOR Z = 50
Zo = 50
PCK940L D.U.T. Zo = 50
RT = 50
RT = 50
VT
VT
002aab890
Fig 9. PECL_CLK PCK940L AC test reference for VCC = 3.3 V and VCC = 2.5 V
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
10 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
11. Package outline
LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm SOT358-1
c
y X
24 25
17 16 ZE
A
e E HE wM bp pin 1 index 32 1 e bp D HD wM B vM B 8 ZD vM A 9 detail X L Lp A A2 A 1 (A 3)
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.6 A1 0.20 0.05 A2 1.45 1.35 A3 0.25 bp 0.4 0.3 c 0.18 0.12 D (1) 7.1 6.9 E (1) 7.1 6.9 e 0.8 HD 9.15 8.85 HE 9.15 8.85 L 1 Lp 0.75 0.45 v 0.2 w 0.25 y 0.1 Z D (1) Z E (1) 0.9 0.5 0.9 0.5 7 o 0
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT358 -1 REFERENCES IEC 136E03 JEDEC MS-026 JEITA EUROPEAN PROJECTION
ISSUE DATE 03-02-25 05-11-09
Fig 10. Package outline SOT358-1 (LQFP32)
PCK940L_1 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
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Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
12. Soldering
12.1 Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
12.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 C to 260 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:
* below 225 C (SnPb process) or below 245 C (Pb-free process)
- for all BGA, HTSSON..T and SSOP..T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages.
* below 240 C (SnPb process) or below 260 C (Pb-free process) for packages with a
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
12.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
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Product data sheet
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Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
- smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle to
the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
12.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 C and 320 C.
12.5 Package related soldering information
Table 12. Package[1] BGA, HTSSON..T[3], LBGA, LFBGA, SQFP, SSOP..T[3], TFBGA, VFBGA, XSON DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC[5], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP CWQCCN..L[8], PMFP[9], WQCCN..L[8]
[1] [2]
Suitability of surface mount IC packages for wave and reflow soldering methods Soldering method Wave not suitable not suitable[4] Reflow[2] suitable suitable
suitable not not recommended[5][6] recommended[7]
suitable suitable suitable not suitable
not suitable
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible.
[3]
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
13 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
[4]
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request. Hot bar soldering or manual soldering is suitable for PMFP packages.
[5] [6] [7] [8]
[9]
13. Abbreviations
Table 13. Acronym LVCMOS LVPECL PLL Abbreviations Description Low Voltage Complementary Metal Oxide Semiconductor Low Voltage Positive Emitter Coupled Logic Phase-Locked Loop
14. Revision history
Table 14. Revision history Release date 20060404 Data sheet status Product data sheet Change notice Supersedes Document ID PCK940L_1
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 4 April 2006
14 of 16
Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
15. Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.semiconductors.philips.com.
15.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Philips Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Philips Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of a Philips Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Philips Semiconductors accepts no liability for inclusion and/or use of Philips Semiconductors products in such equipment or applications and therefore such inclusion and/or use is for the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- Philips Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.semiconductors.philips.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Philips Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
15.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, Philips Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- Philips Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- Philips Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
16. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
PCK940L_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
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Philips Semiconductors
PCK940L
Low voltage 1 : 18 clock distribution chip
17. Contents
1 2 3 4 5 5.1 5.2 6 6.1 7 8 9 9.1 10 11 12 12.1 12.2 12.3 12.4 12.5 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . 9 Test information . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 12 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 12 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 13 Package related soldering information . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) Koninklijke Philips Electronics N.V. 2006.
All rights reserved.
For more information, please visit: http://www.semiconductors.philips.com. For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com. Date of release: 4 April 2006 Document identifier: PCK940L_1

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